1. Field of the Invention
This invention relates generally to operational amplifier (op-amp) slew rate boosting schemes, and more particularly to a technique to boost the slew rate of a fully differential op-amp which has a closed-loop gain that is unity or less.
2. Description of the Prior Art
Fully differential folded cascode op-amps with a closed-loop gain that is unity or less are well known in the prior art. One such op-amp is illustrated in FIG. 1. The circuit of FIG. 1 includes input differential pair 20; transistors 22-25; output buffers 26 and 28; compensation capacitors 30 and 32; resistors 34 and 36; input resistors 44 and 45 (Ri); feedback resistors 46 and 47 (Rf); input nodes IN+ and INxe2x88x92; tail current source Itail; bias voltage Vbias; common mode feedback VCMF; and output nodes OUT+ and OUTxe2x88x92. The output buffers 26 and 28 are typically class AB buffers. The equations, which govern the operation of the op-amp, are also very well known and have been documented by Paul R. Gray and Robert G. Meyer in Analysis and Design of Analog Integrated Circuits, pp. 646xe2x80x94onward, John Wiley and Sons, Inc., 3rd Edition. It has been shown that if the op-amp is to be made stable, one must control its unity gain crossing frequency. The conventional technique for controlling this unity gain crossing frequency is to use compensation capacitors 30 and 32 that couple nodes 40 and 42 to ground. The frequency where the open loop gain falls to unity for the op-amp is then defined as:                               f          unity                =                              G            m                                2            ⁢            π            ⁢                          xe2x80x83                        ⁢                          C              comp                                                          (        1        )            
where Gm is the transconductance of the input stage 20 and is determined by the tail current Itail shared by the input stage 20 transistors, and Ccomp is the capacitance value for capacitors 30 and 32. Specifically, Gm is defined as:                     Gm        =                              qI            tail                                2            ⁢            kT                                              (        2        )            
The slew rate (maximum rate of change in output voltage for large input signals) for the op-amp is defined as:                     Slewrate        =                              I            tail                                C            comp                                              (        3        )            
where it is well known the compensation capacitance Ccomp must be set to a sufficiently large value in order to make the op-amp stable. Conventional op-amp compensation techniques provide a high small signal open loop voltage gain at a high output impedance at the op-amp gain node. This high output impedance in combination with the compensation capacitor then operates to place the dominant pole. When a conventional op-amp uses a compensation capacitor to achieve stability, all of the input stage tail current will flow into the compensation capacitor in response to a large step input voltage since one end of the compensation capacitor is coupled to the high impedance gain node while the opposite end of the compensation capacitor is coupled to an AC ground. The tail current will charge the compensation capacitor to achieve a slew rate defined by equation (3) above.
If more than two poles exist before the unity gain frequency funity is reached, the op-amp will be unstable. Specifically the compensation capacitors 30 and 32 operate to push the first dominant pole down to a low enough frequency such that the op-amp gain falls below unity before the second pole is reached. Setting the value of compensation capacitance Ccomp to achieve the above desired stability characteristics therefore also establishes the maximum slew rate for the op-amp as set forth in equation (3) above. It is, of course, desirable to have a very high slew rate. In view of the foregoing, it can be appreciated that achieving a very high slew rate requires reducing the value of the compensation capacitance Ccomp. Reducing the value of the compensation capacitance Ccomp however, makes the op-amp less stable since the first dominant pole will then be moved to a higher frequency as discussed herein before. The desired value of the compensation capacitance Ccomp and the desired high slew rate are therefore in direct conflict with one another.
One conventional technique used to address the direct conflict between the desired value of the compensation capacitance Ccomp and the desired high slew rate includes reducing the value of transconductance Gm associated with the input stage 20 by inserting resistors into the emitter paths of the input stage 20 transistors. A lower value for the compensation capacitance Ccomp can then be used to achieve amplifier stability as seen by equation (1) above, which also then increases the slew rate as seen by equation (3) above. This technique however, is problematic in that the emitter resistors added to the emitter paths of the input stage 20 transistors introduce additional noise that cannot be tolerated in specific applications such as when the op-amp is driving a load that is connected to ground in response to an input signal such as might be used to accommodate ADSL systems.
In view of the foregoing, a need exists for a technique to boost the slew rate of fully differential amplifiers having a closed-loop gain of close to unity or less without introducing additional noise into the system.
The fully differential amplifier slew rate boosting scheme for use with an amplifier having a closed-loop gain very near unity or less has the first plates of the compensation capacitors conventionally coupled to internal high impedance gain nodes, but has the other plates of the compensation capacitors unconventionally driven with the input signal. The voltages appearing across the compensation capacitors in response to changes in the input signal is significantly less than that achieved using conventional compensation architectures where the other plates of the compensation capacitors are coupled to ground. Since little current is now required to charge the compensation capacitors, the input stage tail current no longer limits the slew rate.